Commit: See in git+ssh://linaroci@gcc.gnu.org/git/gcc.git
commit gcc-17-5220-g78f0a4e05820
Author: Andrew Stubbs <ams@baylibre.com>
Date:   Tue Mar 17 10:40:56 2026 +0000

    rtl: Allow "(mem:<vecmode> (reg:<vecmode>))"
    
    This patch makes the middle-end adjustments needed to allow a MEM to take a
    vector of addresses in order to read/write a non-contiguous vector of data.
    Mostly the changes don't have to do anything besides letting the vectors pass.
... 59 lines of the commit log omitted.

* tcwg_bootstrap_build
** master-arm-bootstrap_lto
*** Failure
*** https://gitlab.com/LinaroLtd/tcwg/ci/interesting-commits/-/raw/master/gcc/sha1/78f0a4e05820fd542ee3c5632ce79fa3008a3bb6/tcwg_bootstrap_build/master-arm-bootstrap_lto/details.txt
*** http://54.172.246.49:9090/jobs/tcwg_bootstrap_build--master-arm-bootstrap_lto-build/builds/10198/archive/artifacts/

Latest data: https://gitlab.com/LinaroLtd/tcwg/ci/interesting-commits/-/raw/master/gcc/sha1/78f0a4e05820fd542ee3c5632ce79fa3008a3bb6/jira/yaml