Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In bootstrap_build master-arm-bootstrap_ubsan, after:
  | 60 commits in gcc
  | 26ef750bfe4 rs6000: Corrections for the AES builtins for powerpc
  | 035f177a1ea s390: Remove -m31 support
  | e5af677005c Daily bump.
  | 05c929c143c [PATCH] RISC-V: Enable TARGET_SFB_ALU for andes-45-series
  | 9decb8a07ac fortran: Fix derived type rank not set for allocate mold
  | ... and 55 more commits in gcc

Produces Success:
  | Results changed to
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe bootstrap_ubsan:
  | 1
  | 
  | From
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe bootstrap_ubsan:
  | 1

Used configuration :
 *CI config* tcwg_bootstrap_build master-arm-bootstrap_ubsan
 *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

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The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in
 * http://54.172.246.49:9090/jobs/tcwg_bootstrap_build--master-arm-bootstrap_ubsan-build/builds/10098/archive/artifacts/
The full lists of regressions and improvements as well as configure and make commands are in
 * http://54.172.246.49:9090/jobs/tcwg_bootstrap_build--master-arm-bootstrap_ubsan-build/builds/10098/archive/artifacts/notify/

Current build   : http://54.172.246.49:9090/jobs/tcwg_bootstrap_build--master-arm-bootstrap_ubsan-build/builds/10098/archive/artifacts/
Reference build : http://54.172.246.49:9090/jobs/tcwg_bootstrap_build--master-arm-bootstrap_ubsan-build/builds/10097/archive/artifacts/