Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In  armv8l-unknown-linux-gnueabihf native, after:
  | 25 commits in gcc
  | aefb5d254264 x86: Add more tests for PR target/110533
  | 22b4c66f60ce RISC-V: Adjust test case due to allow vf[sz]ext.vf8 overlap
  | a41481d8f6f4 RISC-V: Adjust the scan asm for v[sz]ext.vf2 for v[123]
  | 73ffdaa29d58 RISC-V: Add test cases for vzext.vf8 reg overlap
  | f1c03c18ef6f RISC-V: Add test cases for vsext.vf8 reg overlap
  | ... and 20 more commits in gcc

Produces Success:
  | Results changed to
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe gcc:
  | 1
  | 
  | From
  | # reset_artifacts:
  | -10
  | # true:
  | 0
  | # build_abe gcc:
  | 1

Used configuration :
 *CI config* tcwg_gcc_build armv8l-unknown-linux-gnueabihf
 *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf--disable-multilib --with-float=hard --with-mode=thumb --with-tune=cortex-a9 --with-arch=armv7-a --with-fpu=neon-fp-armv8

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

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The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in
 * http://54.172.246.49:9090/jobs/tcwg_gcc_build--master-arm-build/builds/10369/archive/artifacts/
The full lists of regressions and improvements as well as configure and make commands are in
 * http://54.172.246.49:9090/jobs/tcwg_gcc_build--master-arm-build/builds/10369/archive/artifacts/notify/

Current build   : http://54.172.246.49:9090/jobs/tcwg_gcc_build--master-arm-build/builds/10369/archive/artifacts/
Reference build : http://54.172.246.49:9090/jobs/tcwg_gcc_build--master-arm-build/builds/10368/archive/artifacts/