Commit: See in git+ssh://linaroci@gcc.gnu.org/git/gcc.git
gcc patch https://patchwork.sourceware.org/patch/135237
Author: Steve Markgraf <steve@steve-m.de>
Date:   Mon May 18 23:20:48 2026 +0200

    [PATCH v4] rs6000: Add MPCCORE to TARGET_NO_LWSYNC
    
    The MPC8xx PowerQUICC family only implements full 'sync', 'lwsync'
    is not yet supported. The CPU actually checks that the
    should-be-zero bits of the sync instruction are zero, and faults
... 30 lines of the commit log omitted.
... applied on top of baseline commit:
6953b4ea86a rs6000: Adding missed ISA 3.0 atomic memory operation instructions

* tcwg_gcc_check
** master-aarch64
*** no regression/no fix
*** https://gitlab.com/LinaroLtd/tcwg/ci/interesting-commits/-/raw/master/gcc/sha1/8b057ce9f5bfc13b811197bdd7daa1b8c4b5c795/tcwg_gcc_check/master-aarch64/details.txt
*** http://54.172.246.49:9090/jobs/tcwg_gcc_check--master-aarch64-precommit/builds/10357/archive/artifacts/

Latest data: https://gitlab.com/LinaroLtd/tcwg/ci/interesting-commits/-/raw/master/gcc/sha1/8b057ce9f5bfc13b811197bdd7daa1b8c4b5c795/jira/yaml