Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In  armv8l-unknown-linux-gnueabihf native, after:
  | 9 commits in gcc
  | 83f3afe15d6 x86: Compile some BF16 tests with -mno-avx512bf16 -mno-avxneconvert
  | e7a2a4825d9 ext-floating14.C: Compile with -mno-avx512bf16 -mno-avxneconvert
  | beaa3e1858e uintr-4.c: Check SSE, AVX or AVX512 in the error message
  | 62993cc9d22 tree-optimization: Handle variable trip count XOR in final value replacement [PR112104]
  | 17e01b00f0e gcc.target/i386/pr84876.c: Compile with -mno-avx512f
  | ... and 4 more commits in gcc


Used configuration :
 *CI config* tcwg_gcc_check armv8l-unknown-linux-gnueabihf
 *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf--disable-multilib --with-float=hard --with-mode=thumb --with-tune=cortex-a9 --with-arch=armv7-a --with-fpu=neon-fp-armv8

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

-----------------8<--------------------------8<--------------------------8<--------------------------

The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in *.log.1.xz files in
 * http://54.172.246.49:9090/jobs/tcwg_gcc_check--master-arm-build/builds/10557/archive/artifacts/00-sumfiles/
The full lists of regressions and improvements as well as configure and make commands are in
 * http://54.172.246.49:9090/jobs/tcwg_gcc_check--master-arm-build/builds/10557/archive/artifacts/notify/
The list of [ignored] baseline and flaky failures are in
 * http://54.172.246.49:9090/jobs/tcwg_gcc_check--master-arm-build/builds/10557/archive/artifacts/sumfiles/xfails.xfail

Current build   : http://54.172.246.49:9090/jobs/tcwg_gcc_check--master-arm-build/builds/10557/archive/artifacts/
Reference build : http://54.172.246.49:9090/jobs/tcwg_gcc_check--master-arm-build/builds/10555/archive/artifacts/